Modern processors are often implemented with multiple cores. Typically, all of these cores are of a homogenous nature. That is, each core is of an identical design and thus has an identical layout, implements the same instruction set architecture (ISA), and so forth. In turn, an operating system (OS) of a system including the processor can select any of these multiple cores to handle tasks.
As time progresses, processors are being introduced with heterogeneous resources. Oftentimes these resources are specialized accelerators to perform specialized tasks. However, it is anticipated that processors will be introduced that include heterogeneous cores that have different characteristics. An OS that is designed for a symmetric system cannot be used with such a processor. Accordingly, there is a requirement to design a specialized OS to interface with an asymmetric processor. Thus regardless of whether a system is a so-called single ISA system having cores of identical ISA but having different performance levels or a system with cores having different ISAs, the OS or other supervisor software such as a hypervisor is aware of the topology including all core resources and thus schedules tasks to the appropriate type of core.